Recent progress in minimization of transistor causes a steady increase in not only leak current of the transistor but also power consumption of LSI (Large Scale Integrated circuit).
As a method for decreasing the leakage current of transistor, known is the back bias control technique that applies a back bias (reverse bias, substrate bias) voltage to a substrate of the transistor.
In a known substrate bias generation circuit generating the back bias voltage, the back bias voltage is generated by a boost charge pump of clock application type.
FIGS. 12 and 13 are diagrams illustrating examples of constitution of the boost charge pump of clock application type. FIG. 12 is a diagram illustrating an example of diode charge pump, whereas FIG. 13 is a diagram illustrating an example of Dickson type charge pump.
In Patent Document 1 below, there is disclosed a semiconductor integrated circuit apparatus having a charge pump circuit driven by a power supply voltage, wherein a generated negative voltage is used as the back bias voltage.    Patent Document 1: Japanese Laid-Open Patent Publication No. 2001-35161
When the scale of LSI is increased, the substrate leakage current of transistor is increased and the charge amount that would be applied is increased. However, since the clock application type boost charge pump described above drives the capacitors to generate the charge, it is desired to increase the number of the circuits or increase the capacity of the capacitor or the clock frequency, which causes an increase in circuit scale or in power consumption of the circuit.
As this, the known LSI having a clock application type charge pump has a problem that the circuit scale increases or the power consumption of the circuit increases.